How To Calculate The Number Of Registers

Associates - Registers

Processor operations mostly involve processing information. This data can be stored in retention and accessed from thereon. However, reading information from and storing data into memory slows downwardly the processor, every bit information technology involves complicated processes of sending the data asking across the control motorbus and into the retention storage unit of measurement and getting the information through the same channel.

To speed upward the processor operations, the processor includes some internal retentiveness storage locations, called registers.

The registers store data elements for processing without having to access the retentiveness. A limited number of registers are built into the processor chip.

Processor Registers

At that place are ten 32-fleck and six xvi-bit processor registers in IA-32 architecture. The registers are grouped into three categories −

General registers,
Control registers, and
Segment registers.

The general registers are further divided into the following groups −

Data registers,
Pointer registers, and
Index registers.

Data Registers

Four 32-bit data registers are used for arithmetic, logical, and other operations. These 32-bit registers can be used in three ways −

Equally complete 32-bit information registers: EAX, EBX, ECX, EDX.
Lower halves of the 32-flake registers can be used as four 16-chip data registers: AX, BX, CX and DX.
Lower and higher halves of the to a higher place-mentioned four 16-bit registers can be used as viii 8-flake information registers: AH, AL, BH, BL, CH, CL, DH, and DL.

Data Registers

Some of these data registers have specific use in arithmetical operations.

AX is the primary accumulator; it is used in input/output and most arithmetic instructions. For case, in multiplication performance, ane operand is stored in EAX or AX or AL register according to the size of the operand.

BX is known as the base annals, as it could be used in indexed addressing.

CX is known as the count register, as the ECX, CX registers store the loop count in iterative operations.

DX is known equally the data register. Information technology is also used in input/output operations. It is as well used with AX register along with DX for multiply and divide operations involving large values.

Pointer Registers

The arrow registers are 32-scrap EIP, ESP, and EBP registers and corresponding 16-bit right portions IP, SP, and BP. There are 3 categories of pointer registers −

Instruction Pointer (IP) − The 16-bit IP annals stores the get-go address of the next education to be executed. IP in association with the CS register (as CS:IP) gives the complete accost of the current instruction in the code segment.
Stack Pointer (SP) − The 16-bit SP register provides the start value within the program stack. SP in association with the SS annals (SS:SP) refers to exist electric current position of data or address inside the program stack.
Base Pointer (BP) − The 16-flake BP annals mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the starting time in BP to become the location of the parameter. BP can also be combined with DI and SI as base annals for special addressing.

Pointer Registers

Index Registers

The 32-bit alphabetize registers, ESI and EDI, and their 16-bit rightmost portions. SI and DI, are used for indexed addressing and sometimes used in improver and subtraction. There are 2 sets of index pointers −

Source Index (SI) − It is used every bit source index for cord operations.
Destination Index (DI) − Information technology is used as destination index for string operations.

Index Registers

Command Registers

The 32-scrap instruction pointer register and the 32-bit flags register combined are considered as the control registers.

Many instructions involve comparisons and mathematical calculations and change the status of the flags and another provisional instructions test the value of these status flags to accept the control flow to other location.

The common flag bits are:

Overflow Flag (OF) − It indicates the overflow of a high-order flake (leftmost bit) of data after a signed arithmetic operation.
Direction Flag (DF) − It determines left or right direction for moving or comparison cord data. When the DF value is 0, the string operation takes left-to-right direction and when the value is set to ane, the cord operation takes right-to-left direction.
Interrupt Flag (IF) − Information technology determines whether the external interrupts like keyboard entry, etc., are to exist ignored or processed. It disables the external interrupt when the value is 0 and enables interrupts when fix to ane.
Trap Flag (TF) − Information technology allows setting the operation of the processor in single-footstep mode. The DEBUG program nosotros used sets the trap flag, then we could pace through the execution one pedagogy at a time.
Sign Flag (SF) − It shows the sign of the result of an arithmetic functioning. This flag is set up according to the sign of a data item following the arithmetic operation. The sign is indicated past the high-order of leftmost bit. A positive outcome clears the value of SF to 0 and negative effect sets it to 1.
Zero Flag (ZF) − It indicates the consequence of an arithmetic or comparison operation. A nonzero result clears the zero flag to 0, and a zero result sets information technology to 1.
Auxiliary Carry Flag (AF) − Information technology contains the comport from bit 3 to bit 4 following an arithmetics operation; used for specialized arithmetics. The AF is fix when a 1-byte arithmetic performance causes a acquit from chip 3 into bit four.
Parity Flag (PF) − It indicates the total number of 1-bits in the result obtained from an arithmetic performance. An even number of ane-$.25 clears the parity flag to 0 and an odd number of 1-bits sets the parity flag to 1.
Carry Flag (CF) − It contains the bear of 0 or i from a loftier-lodge bit (leftmost) after an arithmetics performance. It also stores the contents of final bit of a shift or rotate operation.

The following table indicates the position of flag bits in the xvi-bit Flags register:

Flag:					O	D	I	T	S	Z		A		P		C
Chip no:	15	14	13	12	11	10	9	eight	7	6	5	4	3	two	ane	0

Segment Registers

Segments are specific areas defined in a program for containing information, code and stack. In that location are three main segments −

Code Segment − It contains all the instructions to exist executed. A xvi-chip Code Segment register or CS register stores the starting accost of the code segment.
Data Segment − It contains data, constants and work areas. A 16-flake Data Segment register or DS annals stores the starting accost of the data segment.
Stack Segment − Information technology contains data and return addresses of procedures or subroutines. It is implemented equally a 'stack' data structure. The Stack Segment register or SS register stores the starting address of the stack.

Autonomously from the DS, CS and SS registers, there are other actress segment registers - ES (extra segment), FS and GS, which provide boosted segments for storing data.

In assembly programming, a plan needs to access the memory locations. All retentiveness locations inside a segment are relative to the starting accost of the segment. A segment begins in an address evenly divisible by 16 or hexadecimal ten. And then, the rightmost hex digit in all such memory addresses is 0, which is non generally stored in the segment registers.

The segment registers stores the starting addresses of a segment. To get the verbal location of data or instruction inside a segment, an offset value (or displacement) is required. To reference any memory location in a segment, the processor combines the segment address in the segment register with the offset value of the location.

Example

Look at the following uncomplicated plan to understand the use of registers in assembly programming. This program displays 9 stars on the screen forth with a simple message −

department	.text    global _start	 ;must be declared for linker (gcc) 	 _start:	         ;tell linker entry point    mov	edx,len  ;message length    mov	ecx,msg  ;message to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,four    ;system call number (sys_write)    int	0x80     ;phone call kernel 	    mov	edx,9    ;message length    mov	ecx,s2   ;message to write    mov	ebx,i    ;file descriptor (stdout)    mov	eax,4    ;organization call number (sys_write)    int	0x80     ;telephone call kernel 	    mov	eax,ane    ;system phone call number (sys_exit)    int	0x80     ;phone call kernel 	 section	.data msg db 'Displaying 9 stars',0xa ;a message len equ $ - msg  ;length of message s2 times ix db '*'

When the above lawmaking is compiled and executed, it produces the following result −